RISC-emu Changelog
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v0.42
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- Preliminary support for sorting rom module authentication scheme.
  The random values are stored at registers 0x90, 0x91, 0x92 after startup.
- Added support for the "random reg" instruction

v0.41
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- Added Support for the new "swap reg1,reg2" instruction (opcode 0x82)
- Preliminary support for the "random reg" instruction 

v0.40
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- The CPU architecture has changed significantly so this version is an almost complete rewrite.
  *ram 1024 bytes, 
  *registers 256, 4-bytes each 
  *The instruction size is now 4 bytes.